NCP1927DR2G【PDF 4/24 页】IC CTLR PFC/FLYBACK 16-SOIC

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Sheet目录45

1页 2页 3页 [4页]5页 6页 7页 8页

NCP1927

http://onsemi.com

PIN FUNCTION DESCRIPTION

Pin No.

Pin Name

Pin Description

POVUV

The gate drive is disabled while V

POVUV

is below V

UVP

(300 mV typ) or above V

OVP

(2.5 V typ).

PFB

This pin receives a portion of the preconverter output voltage. This information is used for the

regulation and the output low detection that speeds up the loop response when the output voltage

drops below 95.5% (typ) of the programmed level.

Shutdown

Pull this pin above 1.0 V (typ) to disable the part. Ground this pin when not in use.

PControl

The error amplifier output is available on this pin. The capacitor connected between this pin and

ground adjusts the regulation loop bandwidth that is typically set below 20 Hz to achieve a high power

factor. This pin is internally grounded when the circuit is off so that when it starts operation, the power

increases gradually (softstart).

PCT

The PCT pin sources a 210 mA (typ) current to charge an external timing capacitor. The circuit

controls the power switch on time by comparing the PCT voltage to an internal voltage derived from

the regulation block.

PZCD

The voltage of an auxiliary winding is applied to this pin to detect when the inductor is demagnetized

for operation in critical conduction mode.

PCS

This pin monitors a negative voltage proportional to the coil current. This signal is sensed to limit the

maximum coil current and protect the PFC stage during overload conditions.

GTS

Pull this pin low to disable the PFC controller during standby mode. Standby mode can also be

entered by monitoring the feedback voltage of the flyback stage with an external resistor divider.

FCS

This pin senses the primary current for currentmode operation of the flyback stage. Ramp

compensation can be added with an external resistor.

FFB

Connecting this pin to ground through an optocoupler allows regulation of the flyback stage.

GND

This is the the controller ground.

FDRV

This is the drivers output to an external MOSFET gate of the flyback power stage.

This pin is connected to an external auxiliary voltage.

PDRV

This is the drivers output to an external MOSFET gate of the PFC power stage.

PSKIP

To adjust the power level below which the PFC stage will enter skip mode, connect a resistor between

this pin and ground. To disable skip mode, connect this pin directly to ground.

IENABLE

This pin voltage is high (5 V) when the output of the PFC stage is in steady state regulation and low

at all other times. This signal serves to inform the backlight inverter that the PFC output is ready and

that it can start operation. It can also be used as a stable 5 V reference.

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